> The real plate load line is not straight, because of screen grid current.
> On virtual Ep-Ip* plane (Ip* = Ip + b * Ig2, red dashed line),
> the virtural load line would be straight.
> Your load line by throughline corresponds to dasshed line
> and your points are for real plate current,
> so the load line and points are not coincident.
> In designing the circuit, you should use virtual Ep-Ip* and the virtual load line
> and the power output is determined by this virtual load line.
Thank you again! Yes that's what I was trying to plot - the virtual load line, since a small part of the output power also comes from the screen grid when in UL mode. Without your help, I don't think I could ever figure it out! pctube is such great program, there are so many tasks you can do with it, just wish I know how to use it better.